LinuxBIOS Options

This is an automatically generated list of LinuxBIOS compile time options. Created at 2005/03/19 21:11:52.

Option Comment Default Export Format
ARCH "Default architecture is i386, options are alpha and ppc" "i386" always
HAVE_MOVNTI "This cpu supports the MOVNTI directive" 0 always
CROSS_COMPILE "Cross compiler prefix" "" always
CC "Target C Compiler" "$(CROSS_COMPILE)gcc" always
HOSTCC "Host C Compiler" "gcc" always
CPU_OPT "Additional per-cpu CFLAGS" none used
OBJCOPY "Objcopy command" "$(CROSS_COMPILE)objcopy" always
LINUXBIOS_VERSION "LinuxBIOS version" "1.1.8" always "\"%s\""
LINUXBIOS_BUILD "Build date" "$(shell date)" always "\"%s\""
LINUXBIOS_COMPILE_TIME "Build time" "$(shell date +%T)" always "\"%s\""
LINUXBIOS_COMPILE_BY "Who build this image" "$(shell whoami)" always "\"%s\""
LINUXBIOS_COMPILE_HOST "Build host" "$(shell hostname)" always "\"%s\""
LINUXBIOS_COMPILE_DOMAIN "Build domain name" "$(shell dnsdomainname)" always "\"%s\""
LINUXBIOS_COMPILER "Build compiler" "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)" always "\"%s\""
LINUXBIOS_LINKER "Build linker" "$(shell $(CC) -Wl,-v 2>&1 | grep version | tail -n 1)" always "\"%s\""
LINUXBIOS_ASSEMBLER "Build assembler" "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )" always "\"%s\""
CONFIG_CHIP_CONFIGURE "Use new chip_configure method for configuring (non-pci) devices" 0 used
CONFIG_USE_INIT "Use stage 1 initialization code" 0 used
HAVE_FALLBACK_BOOT "Set if fallback booting required" 0 always "%d"
USE_FALLBACK_IMAGE "Set to build a fallback image" 0 used "%d"
FALLBACK_SIZE "Default fallback image size" 65536 used "0x%x"
ROM_SIZE "Size of your ROM" none used "0x%x"
ROM_IMAGE_SIZE "Default image size" 65535 always "0x%x"
ROM_SECTION_SIZE "Default rom section size" {FALLBACK_SIZE} used "0x%x"
ROM_SECTION_OFFSET "Default rom section offset" {ROM_SIZE - FALLBACK_SIZE} used "0x%x"
PAYLOAD_SIZE "Default payload size" {ROM_SECTION_SIZE - ROM_IMAGE_SIZE} always "0x%x"
_ROMBASE "Base address of LinuxBIOS in ROM" {PAYLOAD_SIZE} always "0x%x"
_ROMSTART "Start address of LinuxBIOS in ROM" none used "0x%x"
_RESET "Hardware reset vector address" {_ROMBASE} always "0x%x"
_EXCEPTION_VECTORS "Address of exception vector table" {_ROMBASE+0x100} always "0x%x"
STACK_SIZE "Default stack size" 0x2000 always "0x%x"
HEAP_SIZE "Default heap size" 0x2000 always "0x%x"
_RAMBASE "Base address of LinuxBIOS in RAM" none always "0x%x"
_RAMSTART "Start address of LinuxBIOS in RAM" none used "0x%x"
USE_DCACHE_RAM "Use data cache as temporary RAM if possible" 0 used
DCACHE_RAM_BASE "Base address of data cache when using it for temporary RAM" none used "0x%x"
DCACHE_RAM_SIZE "Size of data cache when using it for temporary RAM" none used "0x%x"
XIP_ROM_BASE "Start address of area to cache during LinuxBIOS execution directly from ROM" 0 used "0x%x"
XIP_ROM_SIZE "Size of area to cache during LinuxBIOS execution directly from ROM" 0 used "0x%x"
CONFIG_COMPRESS "Set for compressed image" 1 always
CONFIG_UNCOMPRESSED "Set for uncompressed image" {!CONFIG_COMPRESS} always "%d"
CONFIG_LB_MEM_TOPK "Kilobytes of memory to initialized before executing code from RAM" 1024 always "%d"
HAVE_OPTION_TABLE "Export CMOS option table" 0 always
LB_CKS_RANGE_START "First CMOS byte to use for LinuxBIOS options" 49 always "%d"
LB_CKS_RANGE_END "Last CMOS byte to use for LinuxBIOS options" 125 always "%d"
LB_CKS_LOC "Pair of bytes to use for CMOS checksum" 126 always "%d"
CRT0 "Main initialization target" "$(TOP)/src/arch/$(ARCH)/init/" always
DEBUG "Enable debugging code" 1 always
CONFIG_CONSOLE_VGA "Log messages to VGA" 0 always
CONFIG_CONSOLE_LOGBUF "Log messages to buffer" 0 always
CONFIG_CONSOLE_SROM "Log messages to SROM console" 0 always
CONFIG_CONSOLE_SERIAL8250 "Log messages to 8250 uart based serial console" 0 always
DEFAULT_CONSOLE_LOGLEVEL "Console will log at this level unless changed" 7 always
CONFIG_SERIAL_POST "Enable SERIAL POST codes" 0 always
NO_POST "Disable POST codes" none used
TTYS0_BASE "Base address for 8250 uart for the serial console" 0x3f8 always "0x%x"
TTYS0_BAUD "Default baud rate for serial console" 115200 always
TTYS0_DIV "Allow UART divisor to be set explicitly" none used "%d"
TTYS0_LCS "Default flow control settings for the 8250 serial console uart" 0x3 always "0x%x"
MAINBOARD "Mainboard name" "Mainboard_not_set" always
MAINBOARD_PART_NUMBER "Part number of mainboard" "Part_number_not_set" always "\"%s\""
MAINBOARD_VENDOR "Vendor of mainboard" "Vendor_not_set" always "\"%s\""
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID "PCI Vendor ID of mainboard manufacturer" 0 always
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID "PCI susbsystem device id assigned my mainboard manufacturer" 0 always "0x%x"
MAINBOARD_POWER_ON_AFTER_POWER_FAIL "Default power on after power fail setting" none used
CONFIG_SYS_CLK_FREQ "System clock frequency in MHz" none used
CONFIG_LEGACY_VGABIOS "Support for legacy VGA BIOS" 0 used
VGABIOS_START "Base of Legacy VGA in Rom" 0 used
CONFIG_SMP "Define if we support SMP" 0 always
CONFIG_LOGICAL_CPUS "Should multiple cpus per die be enabled?" 0 always
HAVE_MP_TABLE "Define to build an MP table" none used
CONFIG_IDE_STREAM "Boot from IDE device" 0 always
CONFIG_ROM_STREAM "Boot image is located in ROM" 0 always
CONFIG_ROM_STREAM_START "ROM stream start location" {0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1} always "0x%x"
CONFIG_FS_STREAM "Boot from a filesystem" 0 always
CONFIG_FS_EXT2 "Enable ext2 filesystem support" 0 always
CONFIG_FS_ISO9660 "Enable ISO9660 filesystem support" 0 always
CONFIG_FS_FAT "Enable FAT filesystem support" 0 always
AUTOBOOT_DELAY "Delay (in seconds) before autobooting" 2 always
AUTOBOOT_CMDLINE "Default command line when autobooting" "hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" always "\"%s\""
HAVE_PIRQ_TABLE "Define if we have a PIRQ table" none used
IRQ_SLOT_COUNT "Number of IRQ slots" none used
CONFIG_IOAPIC "IOAPIC support" none used
CONFIG_IDE "Define to include IDE support" 0 always
IDE_BOOT_DRIVE "Disk number of boot drive" 0 always
IDE_SWAB "Swap bytes when reading from IDE device" none used
IDE_OFFSET "Sector at which to start searching for boot image" 0 always
PCIC0_CFGADDR "Address of PCI Configuration Address Register" none used "0x%x"
PCIC0_CFGDATA "Address of PCI Configuration Data Register" none used "0x%x"
ISA_IO_BASE "Base address of PCI/ISA I/O address range" none used "0x%x"
ISA_MEM_BASE "Base address of PCI/ISA memory address range" none used "0x%x"
PNP_CFGADDR "PNP Configuration Address Register offset" none used "0x%x"
PNP_CFGDATA "PNP Configuration Data Register offset" none used "0x%x"
_IO_BASE "Base address of memory mapped I/O operations" none used "0x%x"
EMBEDDED_RAM_SIZE "Embedded boards generally have fixed RAM size" none used
CONFIG_CHIP_NAME "Compile in the chip name" 0 always
CONFIG_GDB_STUB "Compile in gdb stub support?" 0 used
HAVE_INIT_TIMER "Have a init_timer function" 0 always
HAVE_HARD_RESET "Have hard reset" none used
HARD_RESET_BUS "Bus number of southbridge device doing reset" 1 always
HARD_RESET_DEVICE "Device number of southbridge device doing reset" 5 always
HARD_RESET_FUNCTION "Function number of southbridge device doing reset" 0 always
MEMORY_HOLE "Set to deal with memory hole" none used
MAX_REBOOT_CNT "Set maximum reboots" 3 always
CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 "Use timer2 to callibrate the x86 time stamp counter" 0 used
INTEL_PPRO_MTRR "" none used
CONFIG_UDELAY_TSC "Implement udelay with the x86 time stamp counter" 0 used
FAKE_SPDROM "Use this to fake spd rom values" 0 always
HAVE_ACPI_TABLES "Define to build ACPI tables" 0 always
AGP_APERTURE_SIZE "AGP graphics virtual memory aperture size" none used "0x%x"
CONFIG_SANDPOINT_ALTIMUS "Configure Sandpoint with Altimus PMC" 0 never
CONFIG_SANDPOINT_TALUS "Configure Sandpoint with Talus PMC" 0 never
CONFIG_SANDPOINT_UNITY "Configure Sandpoint with Unity PMC" 0 never
CONFIG_SANDPOINT_VALIS "Configure Sandpoint with Valis PMC" 0 never
CONFIG_SANDPOINT_GYRUS "Configure Sandpoint with Gyrus PMC" 0 never
CONFIG_BRIQ_750FX "Configure briQ with PowerPC 750FX" 0 never
CONFIG_BRIQ_7400 "Configure briQ with PowerPC G4" 0 never